Optimizing the Stability of FETs Based on Two-Dimensional Materials by Fermi Level Tuning

Despite the enormous progress achieved during the past decade, nanoelectronic devices based on two-dimensional (2D) semiconductors still suffer from a limited electrical stability. This limited stability has been shown to result from the interaction of charge carriers originating from the 2D semiconductors with defects in the surrounding insulating materials. The resulting dynamically trapped charges are particularly relevant in field effect transistors (FETs) and can lead to a large hysteresis, which endangers stable circuit operation. Based on the notion that charge trapping is highly sensitive to the energetic alignment of the channel Fermi-level with the defect band in the insulator, we propose to optimize device stability by deliberately tuning the channel Fermi-level. Our approach aims to minimize the amount of electrically active border traps without modifying the total number of traps in the insulator. We demonstrate the applicability of this idea by using two differently doped graphene layers in otherwise identical FETs with Al$_2$O$_3$ as a gate oxide mounted on a flexible substrate. Our results clearly show that by increasing the distance of the Fermi-level to the defect band, the hysteresis is significantly reduced. Furthermore, since long-term reliability is also very sensitive to trapped charges, a corresponding improvement in reliability is both expected theoretically and demonstrated experimentally. Our study paves the way for the construction of more stable and reliable 2D FETs in which the channel material is carefully chosen and tuned to maximize the energetic distance between charge carriers in the channel and the defect bands in the insulator employed.