Wideband high-efficiency linearized PA design with reduction in memory effects and IMD3

ABSTRACT An analytical method is proposed to reduce the memory effects and third-order intermodulation distortions for improving the linearity of wideband power amplifier (PA). An excellent linearity can be obtained by reducing the second-harmonic output power levels and reducing the envelope voltage components in the megahertz range. An improved wideband Chebyshev low-pass matching network including the bias network is analyzed and designed to validate the proposed method. The measured results indicate that a wideband high-efficiency linearized PA is realized from 1.35 to 2.45 GHz (fractional bandwidth = 58%) with power added efficiency of 60–78%, power gain of 10.8–12.3 dB, and output power of 40.0–41.2 dBm. For a 20 MHz LTE modulated signal, the adjacent channel leakage ratios (ACLRs) of the proposed PA with digital pre-distortion (DPD) linearization are −55.7 ~ −53.9 dBc across 1.5–2.4 GHz at an average output power of 32.4–33.6 dBm. For a 40 MHz two-carrier LTE modulated signal, the ACLRs of the proposed PA with DPD linearization are −51.1 ~ −48.2 dBc at an average output power of ~30.5 dBm in the frequency range from 1.5 GHz to 2.4 GHz.