LDMOS
绝缘体上的硅
击穿电压
可靠性(半导体)
材料科学
电气工程
光电子学
电压
物理
工程类
硅
量子力学
功率(物理)
作者
Li Lu,Shulang Ma,Jinyu Xiao,Feng Lin,Shuxian Chen,Hong Shao,Sen Zhang,Kui Xiao,Yixin Dai,Zhihan Zhu,Jia Ma,Jiaxing Wei,Long Zhang,Siyang Liu,Weifeng Sun
标识
DOI:10.1109/ispsd57135.2023.10147740
摘要
In this work, a new 200V 0.18µm SOI-BCD platform has been developed comprehensively including the wide-SOA n&pLDMOS, low-Ron nLDMOS and LIGBT. It is noted that a ultra-thin N-drift has been skillfully applied below the shallow-trench-isolation (STI) structure for the low-Ron nLDMOS to realize an ultra-low specific on-state resistance (R on, sp ) with 20% decrease than the best reported study and the off-state breakdown voltage (BV off ) is also unsacrificed. Moreover, a linear buffer near the drain side has been arranged in the wide-SOA n&pLDMOS for high on-state breakdown voltage (BV on ). Finally, the reliability concerns have been also investigated fully including the negative bias temperature instability (NBTI) for the wide-SOA pLDMOS and hot carrier injection (HCI) for nLDMOS.
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