比较器
CMOS芯片
比较器应用
对偶(语法数字)
计算机科学
电子工程
窗口(计算)
电压
电气工程
工程类
操作系统
文学类
艺术
作者
Hong-Wei Huang,Chia-Hsiang Lin,Ke‐Horng Chen
标识
DOI:10.1109/iscas.2008.4541821
摘要
a programmable dual hysteretic window comparator is presented in this paper. The comparator uses a cascoded flipped voltage follower (CASFVF), a high speed VI converter, and a current comparator to enhance the response time and accuracy. Moreover, the positive and negative hysteretic thresholds can be programmable, respectively. Simulation results in 0.25-μm CMOS technology demonstrate the validity of the designed approach.
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