解复用器
多路复用器
绝缘体上的硅
多路复用
光学
功率分配器和定向耦合器
波分复用
通道间距
光电子学
物理
多模光纤
分路器
材料科学
光纤
波长
硅
电子工程
工程类
作者
Daoxin Dai,Chenlei Li,Shipeng Wang,Hao Wu,Yaocheng Shi,Zijun Wu,Shiming Gao,Tingge Dai,Hui Yu,Hon Ki Tsang
标识
DOI:10.1002/lpor.201700109
摘要
Abstract A dual‐polarization 10‐channel mode (de)multiplexer is proposed and realized with cascaded dual‐core adiabatic tapers on a silicon‐on‐insulator (SOI) platform. The mode demultiplexer has a 2.3 μm‐wide multimode bus waveguide, which supports six mode‐channels of TE polarization and four mode‐channels of TM polarization. These ten mode‐channels are (de)multiplexed with five cascaded dual‐core adiabatic tapers based on SOI nanowires. The widths for these dual‐cores are chosen optimally according to the dispersion curves of the dual‐core SOI nanowire, so that the desired highest‐order modes of TE‐ and TM‐polarizations are extracted simultaneously. These two extracted mode‐channels are coupled very efficiently to the fundamental modes of TE‐ and TM‐polarizations (TE 0 and TM 0 ) in the narrow waveguide, respectively, which are then separated by using a polarization beam splitter based on bent directional couplers. A chip consisting of a pair of 10‐channel mode (de)multiplexers is fabricated and then tested with data transmission of 30Gbps/channel. The measurement results show that all TM‐ and TE mode‐channels have low crosstalks (–15∼–25 dB) and low excess losses (0.2∼1.8 dB) over a broad wavelength band of ∼90 nm, which makes it WDM (wavelength‐division‐multiplexing)‐compatible and thus suitable for high capacity on‐chip optical interconnects.
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