晶体管
NMOS逻辑
CMOS芯片
电压基准
低压
电气工程
材料科学
电压
带隙基准
MOSFET
过驱动电压
偏压
阈值电压
光电子学
灵敏度(控制系统)
电子工程
跌落电压
工程类
作者
Arthur Campos de Oliveira,David Cordova,Hamilton Klimach,Sérgio Bampi
出处
期刊:IEEE Transactions on Circuits and Systems I-regular Papers
[Institute of Electrical and Electronics Engineers]
日期:2018-09-14
卷期号:65 (11): 3790-3799
被引量:48
标识
DOI:10.1109/tcsi.2018.2859341
摘要
In this paper, we propose an ultra-low power compact 3-transistor voltage reference capable of operating at ultra-low supply voltages. The proposed circuit is based on the self-cascode MOSFET (SCM), which provides a reference voltage proportional to the threshold voltage (VT) difference of the two NMOS transistors that compose it. Reverse short-channel and narrow-width effects are explored to obtain such VT difference while using the same type of transistor. Ultra-low power operation and low line sensitivity is achieved by biasing the SCM with a zero-VT (native) transistor, also leading to an area efficient design. To show its versatility, three versions of the proposed circuit were fabricated in a standard 0.13-μm CMOS process. Measurement performed over five samples showed an average temperature coefficient of 150-1500 ppm/°C. Minimum supply voltages of 0.12-0.4 V was observed while providing reference voltages around tens of mV. The proposed circuits consume 0.33-50 pW at room temperature and minimum supply voltage. The occupied area for any version is less than 0.0012 mm2.
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