A Simulation Approach to Analyze Bridge-Defects in a 6T-SRAM Bit Cell

The modern semiconductor technology node causes several failure analysis challenges of the current industry-standard tools to locate the physical defects. Here we discuss such defects in a 6T-SRAM cell. We combine bridge-defect modeling with SPICE simulations and machine learning technique for detect predictions across a node pair. We employ supervised learning algorithm trained with the measurable electrical attributes of the circuit to predict defect location. Then, we utilize t-distributed stochastic neighbor embedding (t-SNE) technique to visualize the multi-dimensional data and interpret how several defect clusters behave. Our approach promises to improve the failure analysis in integrated circuits, enhancing the cycle of design to product.