放大器
CMOS芯片
对数放大器
电气工程
对数
直接耦合放大器
差分放大器
物理
电子工程
计算机科学
运算放大器
工程类
数学
数学分析
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:1993-01-01
卷期号:28 (1): 78-83
被引量:66
摘要
A CMOS logarithmic intermediate-frequency (IF) amplifier that is applied to mobile telecommunications equipment is presented. The CMOS logarithmic IF amplifier has pseudologarithmic rectifiers made from parallel-connecting full-wave rectifiers, consisting of unbalanced source-coupled pairs with the cross-coupled input stage and parallel-connected output stage. A +or-3-dB logarithmic accuracy, a 90-dB input dynamic range, and a -30 to 80 degrees C operating temperature range were achieved with the 1.3- mu m double-polysilicon n-well CMOS process. Typical power consumption by the logarithmic IF amplifier in the fabricated CMOS LSI was 5.5 mW. The block area for the logarithmic IF amplifier was 0.8 mm/sup 2/.< >
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