Emerging 2D Memory Devices for In‐Memory Computing

Abstract It is predicted that the conventional von Neumann computing architecture cannot meet the demands of future data‐intensive computing applications due to the bottleneck between the processing and memory units. To try to solve this problem, in‐memory computing technology, where calculations are carried out in situ within each nonvolatile memory unit, has been intensively studied. Among various candidate materials, 2D layered materials have recently demonstrated many new features that have been uniquely exploited to build next‐generation electronics. Here, the recent progress of 2D memory devices is reviewed for in‐memory computing. For each memory configuration, their operation mechanisms and memory characteristics are described, and their pros and cons are weighed. Subsequently, their versatile applications for in‐memory computing technology, including logic operations, electronic synapses, and random number generation are presented. Finally, the current challenges and potential strategies for future 2D in‐memory computing systems are also discussed at the material, device, circuit, and architecture levels. It is hoped that this manuscript could give a comprehensive review of 2D memory devices and their applications in in‐memory computing, and be helpful for this exciting research area.