薄脆饼
模具(集成电路)
过程(计算)
材料科学
光电子学
模具准备
晶圆制造
计算机科学
工程类
纳米技术
晶片切割
操作系统
作者
Koen Kennes,Anton Dvoretskii,Arnita Podpod,Pengfei Xu,Junwen He,Guy Lepage,Negin Golshani,Peter Verheyen,Rafal Magdziak,Swetanshu Bipul,Alain Phommahaxay,Maumita Chakrabarti,Miller Andy,Eric Beyne,Yoojin Ban,Filippo Ferraro,Joris Van Campenhout
标识
DOI:10.1109/ectc51529.2024.00227
摘要
A collective die-to-wafer (CoD2W) assembly process is demonstrated enabling low-loss die-to-wafer evanescent optical coupling, paving the way to future wafer-level optically interconnected multi-XPU compute systems. As a proof-of-concept demonstrator, PIC chiplets and an optical interconnect wafer were co-designed and fabricated, each having embedded SiN waveguides (WG) and evanescent couplers (EVC). Frontside and backside alignment structures were included to enable accurate alignment of the PIC dies to the interconnect wafer. Before assembly, the PIC dies were thinned to 100 μm and subsequently transferred from a temporary carrier to the target interconnect wafer. After the full process, we realized an assembly yield of up to 96% of mostly void-free dies with die-to-target wafer alignment of 2.4 μm (m+3s), resulting in die-to-wafer optical coupling losses below 0.5 dB at 1310 nm for 76% of the dies.
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