High-speed and accurate cascade detection method for chip surface defects

High-speed and accurate methods for chip-surface-defect detection remain a challenge in the semiconductor industry. Therefore, we propose a Feature Fusion and Data Generation based Cascade detection (FFDG-Cascade) approach. This method cascades a classification module with an object detection module. The classifier screens non-defective samples with high confidence, significantly mitigating the number of samples forwarded to the object detector, and substantially enhancing the efficiency due to classifiers’ higher operational speed than detectors. We enhance the model’s detection capability to detect small target defects by incorporating a Shallow-to-Deep Attentional Feature Fusion (SDAFF) mechanism into the object detection module. In addition, we alleviate network overfitting issues by constructing a large dataset for advanced packaging chips. This dataset comprises 2270 real non-defective samples, 1241 real defective samples, and 7250 synthetic defective samples. For synthetic samples, we propose two defect generation algorithms, each satisfying the requirements of chip production in the early and subsequent stages respectively. Evaluation results demonstrate that integrating synthetic data significantly enhances the detector’s performance by 7.49 mAP on average. Upon incorporating these improvements into the FFDG-Cascade approach, the detection speed increases by 61.77%, while the false acceptance rate (FAR) and false rejection rate (FRR) are reduced by 80.67% and 59.93% on average, respectively. The dataset will be available at https://github.com/HiHiAllen/Chip-surface-defect-dataset.