有效位数
逐次逼近ADC
噪声整形
噪音(视频)
电子工程
计算机科学
二进制数
塑造
电容器
电气工程
电压
工程类
数学
人工智能
CMOS芯片
算术
图像(数学)
作者
Zhiyuan Dai,Hang Hu,Fan Ye,Junyan Ren
标识
DOI:10.1109/icsict.2018.8564900
摘要
Successive approximation register analog-to-digital converter (SAR ADC) is an appropriate choice in moderate sampling rate and moderate resolution. If the target of the ENOB is higher than 11 bits, conventional SAR ADC has difficulty in realizing this target. Noise-shaping SAR ADC is a better way to improve the ENOB by shaping the quantizing noise. This paper proposed a modulator based on a 9-bit resolution SAR ADC and used non-binary DAC array to relieve the setup time of the capacitance and reduce the harmonic wave produced by DAC array.
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