Top-down design of a xDSL 14-bit 4MS/s /spl Sigma//spl Delta/ modulator in digital CMOS technology

This paper describes the design of a sigma-delta modulator aimed at A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35 /spl mu/m mainstream digital CMOS technology. Architecture selection, modulator sizing and cell sizing tasks where supported by a CAD methodology, allowing one to obtain a power efficient implementation in a short design cycle.