随时间变化的栅氧化层击穿
SILC公司
材料科学
PMOS逻辑
NMOS逻辑
MOSFET
光电子学
节点(物理)
存水弯(水管)
电气工程
堆栈(抽象数据类型)
电子工程
逻辑门
栅氧化层
工程类
量子隧道
电压
计算机科学
晶体管
环境工程
结构工程
程序设计语言
作者
P. S. Chen,Y. W. Lee,Dongsheng Huang,S. C. Chen,Chun-Kai Cheng,J. H. Lee,Jun He
标识
DOI:10.1109/irps48227.2022.9764512
摘要
Be closer to real product operation, DC TDDB stress convert to AC TDDB could be one choice to wrestle with advanced node shrink limitation. The physical explanation of AC TDDB improvement is successfully interpreted through the analysis of oxide trap generation with HK/IL gate stack in advanced node FinFET technology using SILC spectrum methodology. It is found that AC TDDB improvement is due to more charge de-trap. NMOS show less shallow and deep electron trap generation on HK and PMOS show less hole trap generation on IL during AC waveform transition.
科研通智能强力驱动
Strongly Powered by AbleSci AI