Traffic Shaping Engine for Time Sensitive Networking Integration within In-Vehicle Networks

In this work authors present a Traffic Shaping Engine (TSE) intended for the next generation of Time Sensitive Networking (TSN) compliant Network/System on Chip (NoC/SoC) devices, targeting especially the automotive industry. The TSE provides a new layer of abstraction that allows to integrate all the TSN standards related to traffic shaping that are applicable to In-Vehicle Networks (IVNs) according to IEEE P802.1DG, providing a common interface for the management of the shapers, independently of the TSN algorithms in place. The TSE provides a Hardware (HW) architecture that solves the traffic shaping processing and adaptation to network status (load balancing) fully autonomously, without intervention from the CPU. The TSE is designed as a coarse-grain configurable HW co-processor or HW Accelerator (HWA) that can be attached to the system CPU, which follows a Software Defined Networking approach. It provides the right interface and set of parameters to handle all the required traffic shaping algorithms in a common and centralized manner in the control plane, while keeping a common data plane regardless of the traffic shaping processing required. The proposed strategy allows to minimize latency and maximize throughput and Quality of Service, contributing towards future automotive Gateway solutions for IVNs with stringent real-time routing and tunneling constraints.