Investigation on NBTI Control Techniques of HKMG Transistors for Low-power DRAM applications

Conventional techniques for negative bias temperature instability (NBTI) improvement were evaluated to apply high-k metal gate (HKMG) for commercial DRAM applications. This research evaluated the role of several essential fabrication process on the PMOS employing channel SiGe (cSiGe) to contain NBTI. At the interlayer (IL), the RF nitridation (RFN) caused radical-induced re-oxidation, and capacitance equalized thickness (CET) increase. Then, reducing nitrogen (N) was not enough to refrain NBTI. On the other hand, modifying de-coupled plasma nitridation (DPN) on the high-k layer was effective to suppress threshold voltage degradation via NBTI with minimized transistor drain-induced barrier lowering (DIBL) degradation. Also, the research proves that the process window of hydrogen (H) passivation must be optimized for low-power DRAM applications since the H passivation improved transconductance, but degraded NBTI.