作者
Chanyeol Choi,Hyunseok Kim,Ji Hoon Kang,Min‐Kyu Song,Han‐Wool Yeon,Celesta S. Chang,Jun Min Suh,Ji Ho Shin,Kuangye Lu,Bo‐In Park,Yeongin Kim,Han Eol Lee,Doyoon Lee,Jae Yong Lee,Ikbeom Jang,Subeen Pang,Kanghyun Ryu,Sang‐Hoon Bae,Yifan Nie,Hyun Kum,Min‐Chul Park,Suyoun Lee,Hyung-jun Kim,Huaqiang Wu,Peng Lin,Jeehwan Kim
摘要
Artificial intelligence applications have changed the landscape of computer design, driving a search for hardware architecture that can efficiently process large amounts of data. Three-dimensional heterogeneous integration with advanced packaging technologies could be used to improve data bandwidth among sensors, memory and processors. However, such systems are limited by a lack of hardware reconfigurability and the use of conventional von Neumann architectures. Here we report stackable hetero-integrated chips that use optoelectronic device arrays for chip-to-chip communication and neuromorphic cores based on memristor crossbar arrays for highly parallel data processing. With this approach, we create a system with stackable and replaceable chips that can directly classify information from a light-based image source. We also modify this system by inserting a preprogrammed neuromorphic denoising layer that improves the classification performance in a noisy environment. Our reconfigurable three-dimensional hetero-integrated technology can be used to vertically stack a diverse range of functional layers and could provide energy-efficient sensor computing systems for edge computing applications.