三角积分调变
共栅
积分器
CMOS芯片
电子工程
噪声整形
运算放大器
电气工程
逆变器
动态范围
运算跨导放大器
工程类
模数转换器
放大器
电压
作者
Gongxing Huang,Cong Wei,Rongshan Wei
出处
期刊:Sensors
[Multidisciplinary Digital Publishing Institute]
日期:2024-02-23
卷期号:24 (5): 1449-1449
摘要
This paper presents a low-power, high-gain integrator design that uses a cascode operational transconductance amplifier (OTA) with floating inverter–amplifier (FIA) assistance. Compared to a traditional cascode, the proposed integrator can achieve a gain of 80 dB, while reducing power consumption by 30%. Upon completing the analysis, the value of the FIA drive capacitor and clock scheme for the FIA-assisted OTA were obtained. To enhance the dynamic range (DR) and mitigate quantization noise, a tri-level quantizer was employed. The design of the feedback digital-to-analog converter (DAC) was simplified, as it does not use additional mismatch shaping techniques. A third-order, discrete-time delta–sigma modulator was designed and fabricated in a 0.18 μm complementary metal-oxide semiconductor (CMOS) process. It operated on a 1.8 V supply, consuming 221 µW with a 24 kHz bandwidth. The measured SNDR and DR were 90.9 dB and 95.3 dB, respectively.
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