Design of Programmable Analog Calculation Unit by Implementing Support Vector Regression for Approximate Computing

In this work, we design a programmable analog calculation unit (ACU) for approximately computing arbitrary functions with two operands. By implementing an efficient scheme of support vector regression, the target functions are retrieved by very large scale integrated circuits in one clock cycle with only 600 transistors. A set of dynamically tunable analog circuits are designed for generating various features of Gaussian kernel functions. By mixing these kernel functions, any specific complex function is computed by the regression. The ACU is designed and simulated in a standard CMOS technology for proof-of-concept. From the circuit simulation results, the proposed ACU calculates all the target functions with the average error less than 1.7%. The performances over energy, flexibility, and hardware efficiency of the proposed ACU are superior to a basic four-bit digital arithmetic logic unit and look-up table based architectures. The robustness against temperature and process variations is also presented with acceptable fluctuations on calculating results. To conveniently integrate the proposed ACUs into ordinary digital systems, we also design the compact memory circuits, which offer dual-mode (analog and binary) data storage/access.