A gate-tunable artificial synapse based on vertically assembled van der Waals ferroelectric heterojunction

• A vertically-integrated ferroelectric memristor demonstrated by the 2D ferroelectric ferroelectric heterojunction. • Memristive behaviour and bassic synaptic functions were realized. • Memristive behaviour and synaptic features can be effectively gate tuned by applying a gate potential. Memtransistor, a multi-terminal device that combines both the characteristics of a memristor and a transistor, has been intensively studied in two-dimensional layered materials (2DLM), which show potential for applications in such as neuromorphic computation. However, while often based on the migration of ions or atomic defects in the conduction channels, performances of memtransistors suffer from the poor reliability and tunability. Furthermore, those known 2DLM-based memtransistors are mostly constructed in a lateral manner, which hinders the further increasing of the transistor densities per area. Until now, fabricating non-atomic-diffusion based memtransistors with vertical structure remains challenging. Here, we demonstrate a vertically-integrated ferroelectric memristor by hetero-integrating the 2D ferroelectric materials CuInP 2 S 6 (CIPS) into a graphite/CuInP 2 S 6 /MoS 2 vertical heterostructure. Memristive behaviour and multi-level resistance states were realized. Essential synaptic behaviours including excitatory postsynaptic current, paired-pulse-facilitation, and spike-amplitude-dependent plasticity are successfully mimicked. Moreover, by applying a gate potential, the memristive behaviour and synaptic features can be effectively gate tuned. Our findings pave the way for the realization of novel gate-tunable ferroelectric synaptic devices with the capability to perform complex neural functions.