期刊:IEEE Microwave and Wireless Components Letters [Institute of Electrical and Electronics Engineers] 日期:2021-12-01卷期号:31 (12): 1291-1294被引量:5
标识
DOI:10.1109/lmwc.2021.3111133
摘要
This letter presents the design of five-cell cascode distributed amplifiers (DAs) in the WIN Semiconductor PIH1-10 enhancement-mode GaAs pHEMT process. Single- and two-stage DA monolithic microwave integrated circuits (MMICs) are demonstrated, with die areas not exceeding $2.5\times1.5$ mm 2 and same-polarity supply and bias voltages. The cascode cells are stabilized using an $RC$ drain-gate feedback network at the common-gate transistor of each cell, and a stability analysis is presented. All transistors have a gate width of $2\,\,\mu \text{m}\,\,\times75$ - $\mu \text{m}$ , with 750- $\mu \text{m}$ total common-source gate periphery per single-stage design. The measured small-signal gain is 11.5 dB with 2.6 dB flatness and 23.2 dB with 3.2 dB flatness for the one- and two-stage amplifiers, respectively, from 10 MHz to 22 GHz. The amplifiers produce over 20-dBm output power at 3-dB gain saturation across the band.