材料科学
晶界
电阻随机存取存储器
神经形态工程学
电阻式触摸屏
热传导
工作(物理)
薄膜
粒度
价(化学)
纳米技术
光电子学
复合材料
微观结构
电气工程
计算机科学
电压
机械工程
物理
量子力学
机器学习
人工神经网络
工程类
作者
Hongyi Dou,Markus Hellenbrand,Ming Xiao,Zedong Hu,Sundar Kunwar,Aiping Chen,Judith L. MacManus‐Driscoll,Q. X. Jia,Haiyan Wang
标识
DOI:10.1002/aelm.202201186
摘要
Abstract Defect engineering in valence change memories aimed at tuning the concentration and transport of oxygen vacancies are studied extensively, however mostly focusing on contribution from individual extended defects such as single dislocations and grain boundaries. In this work, the impact of engineering large numbers of grain boundaries on resistive switching mechanisms and performances is investigated. Three different grain morphologies, that is, “random network,” “columnar scaffold,” and “island‐like,” are realized in CeO 2 thin films. The devices with the three grain morphologies demonstrate vastly different resistive switching behaviors. The best overall resistive switching performance is shown in the devices with “columnar scaffold” morphology, where the vertical grain boundaries extending through the film facilitate the generation of oxygen vacancies as well as their migration under external bias. The observation of both interfacial and filamentary switching modes only in the devices with a “columnar scaffold” morphology further confirms the contribution from grain boundaries. In contrast, the “random network” or “island‐like” structures result in excessive or insufficient oxygen vacancy concentration migration paths. The research provides design guidelines for grain boundary engineering of oxide‐based resistive switching materials to tune the resistive switching performances for memory and neuromorphic computing applications.
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