计算机科学
中央处理器
图形处理单元
产品(数学)
并行计算
多核处理器
超级计算机
图形处理单元的通用计算
建筑
指令集
库达
操作系统
计算科学
计算机体系结构
绘图
艺术
几何学
数学
视觉艺术
作者
Anne C. Elster,Tor A. Haugdahl
出处
期刊:Computing in Science and Engineering
[Institute of Electrical and Electronics Engineers]
日期:2022-03-01
卷期号:24 (2): 95-100
被引量:7
标识
DOI:10.1109/mcse.2022.3163817
摘要
At GTC 2022, Nvidia announced a new product family that aims to cover from small enterprise workloads through exascale high performance computing (HPC) and trillion-parameter AI models. This column highlights the most interesting features of their new Hopper graphical processing unit (GPU) and Grace central processing unit (CPU) computer chips and the Hopper product family. We also discuss some of the history behind Nvidia technologies and their most useful features for computational scientists, such as the Hopper DPX dynamic programming (DP) instruction set, increased number of SMs, and FP 8 tensor core availability. Also included are descriptions of the new Hopper Clustered SMs architecture and updated NVSwitch technologies that integrate their new ARM-based Grace CPU.
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