An 0.08 e–. pJ/step 14-bit gain-adaptive single-slope column ADC with enhanced HDR function for high-quality imagers

We developed a high-speed, power-efficient single-slope column ADC. The ADC detects and attenuates the bright signals before conversion. A 7.1 Mpixel stacked prototype CMOS image sensor implementing the new ADC attains 14bit, 224 fps with good characteristics. The ADC also works efficiently with pixel dual-conversion gain readout, achieving a dynamic range of 91 dB.