脉冲宽度调制
H桥
逆变器
均衡(音频)
半桥
电子工程
功率(物理)
桥(图论)
电气工程
计算机科学
网格
工程类
物理
电压
数学
频道(广播)
医学
几何学
量子力学
内科学
作者
Little Pradhan,Renuka Varma,Abhijit Kshirsagar,D. Venkatramanan,Marco Di Benedetto,Alessandro Lidozzi
出处
期刊:IEEE Transactions on Industrial Electronics
[Institute of Electrical and Electronics Engineers]
日期:2024-01-01
卷期号:: 1-10
标识
DOI:10.1109/tie.2024.3395752
摘要
In a cascaded H-bridge (CHB) multilevel inverter, carrier-based pulse width modulation (PWM) schemes are preferred due to ease of computation and implementation. The commonly used level-shifted carrier PWM (LSPWM) introduces extreme disparity in power handled by each module, specifically for CHBs fed by multiple isolated converters from a common dc link. This power imbalance creates asymmetric thermal and electrical stresses leading to premature failures in overstressed modules. One computationally simple solution to this problem is known as first-in-first-out (FIFO) carrier reassignment, which somewhat reduces the power disparity between the modules compared to LSPWM. This article presents a novel carrier-reassignment scheme for nine-level CHB inverters to achieve perfect power balance across the modules. A quadrant-by-quadrant carrier-reassignment scheme is used which results in minimal computational burden. Since the proposed scheme only requires a sampled voltage reference, it can be well integrated into existing inverter control schemes such as dq-control in grid-tied operation. The proposed scheme is first simulated to verify the improved module power balance in a grid-tied configuration. The results are further verified with a hardware prototype operating in grid-connected mode, demonstrating a near-perfect power balance among the modules.
科研通智能强力驱动
Strongly Powered by AbleSci AI