Tsung-Ying Yang,Huuan-Yao Huang,Yan-Kui Liang,Jui-Sheng Wu,Mei-Yan Kuo,Kuan-Pang Chang,Heng‐Tung Hsu,Edward Yi Chang
出处
期刊:IEEE Electron Device Letters [Institute of Electrical and Electronics Engineers] 日期:2022-08-26卷期号:43 (10): 1629-1632被引量:8
标识
DOI:10.1109/led.2022.3201900
摘要
Normally-off ferroelectric charge trap gate stack GaN high electron mobility transistor (FEG-HEMT) was fabricated with atomic layer etching (ALE) to precisely control the device parameters including $\text {V}_{\text {th}}$ of the device. The ALE process consists of cyclic Cl2 adsorption modification steps and the Ar ion removal steps. The ALE process achieved etch-per-cycle (EPC) of 0.347 nm/cycle and superior etching morphology with RMS $=0.281$ nm. The fabricated GaN HEMT using the ALE process exhibited a high threshold voltage ( $\text {V}_{\text {th}}$ ) of 5.06 V, high maximum drain current ( $\text {I}_{\text {D,MAX}}$ ) of 772 mA/mm with low on-resistance ( $\text {R}_{\text {on}}$ ) of $8.57~\Omega \cdot \text {mm}$ and high breakdown voltage (BV) of 888 V, the device also showed good $\text {V}_{\text {th}}$ uniformity. Finally, the contact resistance ( $\text {R}_{\text {c}}$ ) was reduced from $0.46~\Omega \cdot \text {mm}$ to $0.15~\Omega \cdot \text {mm}$ by the ALE process, and the dynamic on-resistance (dyn- $\text {R}_{\text {on}}$ ) was improved at the same time.