晶片切割
薄脆饼
沟槽
材料科学
模具(集成电路)
模具准备
晶圆回磨
基质(水族馆)
复合材料
可靠性(半导体)
晶圆级封装
晶片键合
光电子学
纳米技术
地质学
物理
功率(物理)
海洋学
量子力学
图层(电子)
作者
Chunsheng Zhu,Heng Li,Gaowei Xu,Luo Li
标识
DOI:10.1016/j.microrel.2014.11.006
摘要
The wafer warpage problem, mainly originated from coefficient of thermal expansion mismatch between the materials, becomes serious in wafer level packaging as large diameter wafer is adopted currently. The warpage poses threats to wafer handling, process qualities, and can also lead to serious reliability problems. In this paper, a novel mechanical diced trench structure was proposed to reduce the final wafer warpage. Deep patterned trenches with a depth about 100 μm were fabricated in the Si substrate by mechanical dicing method. Both experiment and simulation approaches were used to investigate the effect of the trenches on the wafer warpage and the influence of the geometry of the trenches was also studied. The results indicate that, by forming deep trenches, the stress on the individual die is decoupled and the total wafer warpage could be reduced. The final wafer warpage is closely related to the trench depth and die width. Trenched sample with a depth of 100 μm can decrease the wafer warpage by 51.4%.
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