4.6 A $47\text{fs}_{\text{rms}}$-Jitter and 26.6mW 103.5GHz PLL with Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector and Extended Loop Bandwidth

锁相环 抖动 压控振荡器 带宽(计算) PLL多位 相位噪声 电子工程 倍频器 计算机科学 物理 相位检测器 频率合成器 探测器 电气工程 电信 工程类 电压
作者
Jooeun Bang,Jae-Ho Kim,Seohee Jung,Suneui Park,Jaehyouk Choi
标识
DOI:10.1109/isscc42615.2023.10067293
摘要

The W and D bands located at the lower boundary of the sub-THz spectrum are considered viable candidates for CMOS-based wireless-communication systems to utilize sub-THz frequencies. However, there are still many challenges to overcome before these bands can be put to practical use. One of the most critical challenges is the design of a frequency synthesizer to generate sub-THz local-oscillator (LO) signals with extremely low jitter. This is because the value of the rms jitter required to support the target EVM decreases as the LO frequency increases, e.g., the rms jitter of an LO signal at 100GHz must be reduced to less than 50fs to satisfy −30dB EVM for 64-QAM. To achieve such low rms jitter, the bandwidth of a PLL must be extended to suppress the poor phase noise (PN) of a sub-THz VCO, but it cannot sufficiently filter the high in-band PN that is amplified by a large multiplication factor $(M)$ . Thus, to date, cascaded PLLs with frequency multipliers (FMs) [1], [2] have been used extensively since they can solve this dilemma. However, their multi-stage architectures require large power and silicon area. As a single-stage solution, sub-sampling PLLs (SSPLLs) are more efficient in terms of power and area. Since the high phase-error $(\Phi_{\mathsf{ERR}})$ -detection gain $(K_{\mathsf{PD}})$ of the sub-sampling PD (SSPD) can reduce the in-band PN dramatically, SSPLLs can have an extended bandwidth. However, the problem is that this merit of SSPLLs is no longer valid when the frequency of the VCO, $f_{\mathsf{VCO}}$ , is increased much higher than the frequency of the output pole of the SSPD, $f_{\mathsf{RC}}$ . The top of Fig. 4.6.1 shows this situation, in which the value of $K_{\mathsf{PD}}$ is reduced significantly as the $\Phi_{\mathsf{ERR}}$ is suppressed by the pole of the SSPD. Recently, the power-gating injection-locked-FM PD (PG-ILFM PD) was presented to address this $K_{\mathsf{PD}}$ -reduction problem of the SSPD at sub-THz frequencies [3]. First, it generates a discontinuous but ultra-low-jitter signal, $S_{\mathsf{ILFM}}$ , at the exact target frequency, $M\cdot f_{\text{REF}}$ , using a replica VCO (R-VCO). Then, by mixing this $S_{\text{ILFM}}$ with the output of the main VCO (M-VCO), $S_{\mathsf{VCO}}$ , the PG-ILFM PD downconverts the $\Phi_{\mathsf{ERR}}$ information in $S_{\mathsf{VC}0}$ to the baseband before it is suppressed by the output pole of the PD. Thus, it can maintain a high $K_{\mathsf{PD}}$ and low in-band PN even when $f_{\mathsf{VCO}}$ exceeds 100GHz.

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