A Novel Low Power Photodetector Using SOI/Bulk Hybrid Technology With High Responsivity and Detectivity Optimization Capability

In this letter, we present a low-power photodetector with high responsivity and unique capability to optimize detectivity under different illumination condition. Built on 22 nm fully depleted silicon-on-insulator (FDSOI) platform, the photodetector has a hybrid SOI/bulk substrate. An NMOSFET is fabricated in the SOI region, while a surface p+/n photodiode is fabricated within the n-well of the bulk-Si region. These two regions electrically share the common p-Si substrate, working both as the back gate of the NMOSFET and the p-type component of the inner n-well/p-Si substrate photodiode. The two photodiodes design not only increases the light absorption efficiency but also enhances the photovoltage-induced channel control of the NMOSFET. The NMOSFET is also designed to just have a threshold voltage close to the photovoltage, enabling a low power consumption. An adjustable bias is independently applied to the n-well, facilitating detectivity optimization under various illumination conditions. A high responsivity of ~105 A/W with a low dark power consumption of ~1 pW for a drain voltage of 0.1 V is demonstrated.