直接结合
铜
薄脆饼
晶片键合
表征(材料科学)
材料科学
阳极连接
纳米技术
冶金
作者
R. Taïbi,L. Di Cioccio,Cédrick Chappaz,L.L. Chapelon,Pierric Gueguen,J. Dechamp,Roland Fortunier,L. Clavelier
标识
DOI:10.1109/ectc.2010.5490904
摘要
This paper presents the latest results on electrical characterization of wafer to wafer structures made by direct copper bonding. The bonding was achieved at room temperature, atmospheric pressure and ambient air, followed by a 200°C or 400°C post bonding anneal. Description of the 3D integration process and the test-vehicle (which is used to evaluate the impact of bonding on Cu/Cu interface reliability) are described. Daisy chains from hundreds to tens of thousand connexions were tested and showed a resistance of 79.5 mΩ per node (bonding interface + Cu lines), and a specific contact resistance of the bonding around 22.5 mΩ.μm 2 was extracted. These results present patterned Cu/SiO 2 direct bonding as a promising solution for high density 3D integrated stacks.
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