A low-power high-speed 1-Mb CMOS SRAM

An asynchronous dual-port 1-Mb CMOS SRAM is described. The SRAM can operate at a maximum frequency of 220MHz in dual-port mode and dissipates a minimum active power of 31mW and consumes a minimum standby power of 80nW. Simulation results show that the circuit functions properly over a wide range of process, voltage & temperature (PVT) corners. SRAM was custom designed using TSMC CMOS 0.25/spl mu/m 1P5M salicide process and occupies a silicon area of approximately 115mm/sup 2/ (11.5mm /spl times/ 10mm).