High-Voltage Amorphous InGaZnO Thin-Film Transistors With ITO-Modulated Offset Region

This study presents the high-voltage (HV) amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) with an offset region modulated by the indium–tin oxide (ITO) capping layer (ICL) near the drain side. The breakdown voltage (BV) is elevated because the offset region lowers the electric field between the gate and the drain. For the device without an ICL, a BV of 465 V and a large ON-resistance ( ${R} _{\text {on}}$ ) of 1000 $\text{M}\Omega $ are obtained at the offset region length ( ${L} _{\text {offset}}$ ) of $5 ~\mu \text{m}$ . The ICL effectively improves the ON-state characteristics of the HV device by reducing the resistance of the offset region. The output current of the TFTs increases with increasing ICL thickness ( ${T} _{\text {ICL}}$ ) due to the elevated electron density in the ITO film. The a-IGZO TFT achieves a BV of 326 V and a low ${R} _{\text {on}}$ of 207 $\text{k}\Omega $ with an offset region length ( ${L} _{\text {offset}}$ ) of $5 ~\mu \text{m}$ and a ${T} _{\text {ICL}}$ of 11.4 nm. The gate dielectric near the gate corner is found to be a breakdown weak point due to the electric field crowding, as confirmed by the TCAD simulations.