铜互连
材料科学
蚀刻(微加工)
互连
光电子学
可靠性(半导体)
洁净室
节点(物理)
化学机械平面化
电介质
电子工程
电气工程
图层(电子)
计算机科学
纳米技术
工程类
电信
功率(物理)
物理
结构工程
量子力学
作者
Gayle Murdoch,Zsolt Tőkei,Sara Paolillo,O. Varela Pedreira,Kris Vanstreels,Christopher J. Wilson
标识
DOI:10.1109/iitc47697.2020.9515597
摘要
In this paper we present a semidamascene integration approach for interconnect devices as an alternative to dual damascene. A Ru layer is deposited to fill vias and provide an overburden in which we will form lines using subtractive metal etching, enabling easy access to higher line aspect ratios without the need for metal CMP. Subsequent dielectric deposition forms airgaps between the lines. Devices fabricated in imec’s 300mm cleanroom have demonstrated with >80% reproducibility for line structures with 30nm metal pitch. We also present reliability results with extrapolated lifetime > 10 years and benchmark the mechanical strength of semidamascene devices to traditional dual damascene.
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