协处理器
计算机科学
加速
CMOS芯片
矢量处理机
模拟计算机
并行计算
记忆电阻器
计算
矩阵乘法
指令集
计算科学
计算机硬件
嵌入式系统
电子工程
工程类
电气工程
算法
物理
量子
量子力学
作者
Nihar Athreyas,Wenhao Song,Blair Perot,Qiangfei Xia,Abbie Mathew,Jai Gupta,Dev Gupta,J. Joshua Yang
出处
期刊:ACM Journal on Emerging Technologies in Computing Systems
[Association for Computing Machinery]
日期:2018-07-31
卷期号:14 (3): 1-30
被引量:5
摘要
Vector matrix multiplication computation underlies major applications in machine vision, deep learning, and scientific simulation. These applications require high computational speed and are run on platforms that are size, weight, and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet this increasing demand. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient, and compact for some of these applications. One such primitive is a memristor-CMOS crossbar array-based vector matrix multiplication. In this article, we develop a memristor-CMOS analog coprocessor architecture that can handle floating-point computation. To demonstrate the working of the analog coprocessor at a system level, we use a new electronic design automation tool called PSpice Systems Option, which performs integrated cosimulation of MATLAB/Simulink and PSpice. It is shown that the analog coprocessor has a superior performance when compared to other processors, and a speedup of up to 12 × when compared to projected GPU performance is observed. Using the new PSpice Systems Option tool, various application simulations for image processing and solutions to partial differential equations are performed on the analog coprocessor model.<?enlrg 3pt?>
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