Temperature Tracking and Management With Number-Limited Thermal Sensors for Thermal-Aware NoC Systems

多核处理器 可扩展性 过热(电) 计算机科学 结温 互连 炸薯条 芯片上的系统 工作量 芯片上的网络 热的 实时计算 嵌入式系统 电子工程 工程类 并行计算 电气工程 物理 计算机网络 电信 数据库 气象学 操作系统
作者
Kun-Chih Chen,Hsueh-Wen Tang,Yuan-Hao Liao,Yueh-Chi Yang
出处
期刊:IEEE Sensors Journal [Institute of Electrical and Electronics Engineers]
卷期号:20 (21): 13018-13028 被引量:13
标识
DOI:10.1109/jsen.2020.3003657
摘要

As the complexity of multicore system grows with respect to the technology development, the Network-on-Chip (NoC) provides flexible and scalable interconnection for the multicore systems. However, as the complexity of the network increases, the large workload diversity and the time-varying workload distribution result in large power density, which leads to severer thermal problems and makes the temperature distribution of the system become time-varying. To prevent the multicore systems from overheating, in a practical way, many thermal sensors are embedded in the system. However, due to the manufacturing cost constraints, it is not a viable option to involve a massive number of embedded thermal sensors. Therefore, searching for the appropriate locations in offline design phase to allocate the number-limited thermal sensors, which will be used to sense the time-varying system temperature behavior at runtime, is a design challenge. On the other hand, full-chip temperature distribution tracking based on the restricted temperature sensing information affects the efficiency of the involved temperature management. In this paper, we first present a novel thermal sensor allocation methodology by considering the time-varying temperature behavior on the chip according to different applications. Besides, a linear-regression-based reconstruction algorithm is proposed to estimate the full-chip temperature distribution according to the number-limited thermal sensing results. At last, a framework of temperature management with restricted temperature sensing information is introduced. Compared with the conventional methods, the proposed approach can reduce 28% to 92% average error of full-chip temperature estimation, which helps to improve the average system throughput by 60% to 70%.
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