作者
Johannes Müller,Aleksandra Titova,Hongsik Yoon,T. Merbeth,Martin Weisheit,G. Wolf,Sanjeeb Bharali,B. Pfefferling,Yuichi Otani,T. Shapoval,Alberto Cagliani,Ferenc Vajda,Pedram Sadeghi,Christiana Villas-Boas Grimm,Frank Krause,Ines Altendorf,G. Congedo,Róbert Binder,Joachim Metzger,Alexander Lajn,Markus Langner,Young Seon You,O. Kallensee,V. B. Naik,Kazutaka Yamane,Steven Soss
摘要
Embedded STT-MRAM has emerged to high-volume ramp stage. To sustain yield and to guarantee reliable operation of the memory arrays, a solid line of defense strategy is required. The unprecedented complexity of the MTJ, acting as the memory element in this new technology, can be compensated by an equally unprecedented reservoir of versatile characterization methodologies allowing for the prediction of yield and reliability critical properties of the final memory cell. To enhance the turnaround time of tool monitoring and to enable fast film level and patterned MTJ metrology, the transition of classical lab-based methodologies, such as perpendicular magneto-optical Kerr effect, current-in-plane tunneling and ferromagnetic resonance, to full on-chip capability is essential. The complementary use of these magneto-electrical and magneto-optical techniques for drift partitioning as well as their correlation to the final wafer electrical test and reliability are key for establishing a strong line of defense.