Stress from trenches in semiconductor devices

It is common practice in the semiconductor industry to isolate neighboring devices from each other by constructing trenches that are lined with silicon dioxide insulating layers and then filled with polycrystalline silicon. These materials generally exert stress on the isolated devices as a result of thermal mismatch or because of internal structural changes that occur during processing. The stress in silicon can then cause changes in the band gap that alters the device behavior. In circuit designs in which the trench to device spacing is variable, this creates an undesirable variability in the device performance. Calculation of the stress from trench structures or from arrays of structures is a large, nontrivial 3D problem that is currently not feasible with finite difference or finite element methods.