Lv7
5000 积分 2020-12-07 加入
Reconfigurable 2.4/5.0-GHz Dual-Band CMOS Power Amplifier for WLAN 802.11ax
2个月前
已完结
A 12.8–15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation
2个月前
已完结
A Wideband LO Generator for 5G FR1 Bands Using a Single LC-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier
2个月前
已完结
A Fractional-$N$ Sampling PLL With a Merged Constant-Slope DTC and Sampling PD
2个月前
已完结
A Low-Jitter and Low-Fractional-Spur Ring-DCO-Based Fractional-N Digital PLL Using a DTC’s Second-/Third-Order Nonlinearity Cancellation and a Probability-Density-Shaping ΔΣM
2个月前
已完结
4.3 A 76.7fs-lntegrated-Jitter and −71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering
2个月前
已完结
A Low-Spur and Low-Jitter Fractional-$N$ Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering
2个月前
已完结
Reducing flicker noise up-conversion in a 65nm CMOS VCO in the 1.6 to 2.6 GHz band
2个月前
已完结
A 3.7-to-4.1GHz Narrowband Digital Bang-Bang PLL with a Multitaps LMS Algorithm to Automatically Control the Bandwidth Achieving 183fs Integrated Jitter
2个月前
已完结
Toward 5G Software Defined Radio Receiver Front-Ends
4个月前
已完结
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