Suppression Strategy for Oscillatory False Triggering Between Two paralleled GaN-HEMTs Based on Optimization of Parasitic Inductance

Recently, GaN-HEMTs are expected to be applied to high-power applications because of their high-speed switching and low on-resistance, which enables high-efficiency. In high-power applications, the GaN-HEMT is commonly connected in parallel to reduce the current stress. However, the paralleled GaN-HEMTs often suffer from oscillatory false triggering due to fast switching capability. If oscillatory false triggering is occurred, may damage the circuit so that we must be prevented in industrial products. To solve this problem, the purpose of this study is to elucidate design strategy for the parasitic inductance to prevent the oscillatory false triggering in the paralleled GaN-HEMTs. To achieve the purpose, this paper analyzes an equivalent circuit of the single-pulse test circuit with two paralleled GaN-HEMTs after the turn-off transition. As a result, we derived design strategy for parasitic inductances to prevent the oscillatory false triggering and verified the validity of the design strategy by simulations and experiments.