计算机科学
物联网
人工智能
嵌入式系统
计算机硬件
作者
Behnam Khaleghi,Hanyang Xu,Justin Morris,Tajana Rosing
出处
期刊:Design, Automation, and Test in Europe
日期:2021-02-01
卷期号:: 408-413
被引量:2
标识
DOI:10.23919/date51398.2021.9473920
摘要
Hyperdimensional computing (HD) is a new brain-inspired algorithm that mimics the human brain for cognitive tasks. Despite its inherent potential, the practical efficiency of HD is tied to the underlying hardware, which throttles the efficiency of HD in conventional microprocessors. In this paper, we propose tiny-HD, a light-weight dedicated HD platform that targets low power, high energy efficiency, and low latency, while being configurable to support various applications. We leverage an enhanced HD encoding that alleviates the memory requirements and also simplifies the dataflow to make tiny-HD flexible with an efficient architecture. We further augment tiny-HD by pipelining the stages and resource sharing, as well as a data layout that enables opportunistic power reduction. We compared tiny-HD in terms of area, performance, power, and energy consumption with the state-of-the-art HD platforms. tiny-HD occupies ~0.5 mm2, consumes 1.6mW standby and 9.6mW runtime power (at 400 MHz), with a 0.016ms latency on a set of IoT benchmarks. tiny-HD consumes average per-query energy of 160 nJ, which outperforms the state-of-the-art FPGA and ASIC implementations by 95.5× and 11.2×, respectively.
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