Highly Thermal Dissipation for Large HPC Package Using Liquid Metal Materials

Artificial intelligent, human augmentation and interactive robotic engineering are shaping the world rapidly. This trend demands big data transmission rate, but the memory bandwidth was limited. High-bandwidth memory (HBM) was developed to solve this limitation. However, the HBM packages require 2/2 μm Cu line space to have optimum data efficiency. Thus, they are either packed together with GPU or ASIC dies to form a High Performing Computing (HPC) package. The packaging can be either packaged by 2, 4, 6 or 8 HBMs. This causes a package to become very large and generate severe package warpage. HPC package requires extremely high thermal dissipation, but the package warpage induces higher bond line thickness (BLT), causes lower thermal transfer efficiency. Thus, it is crucial to develop a higher and flexible to large-area thermal dissipation package. In this paper, liquid thermal dissipation (LTD) package is developed to enable large package thermal dissipation requirements. In this study, test vehicle A with the size of 50 * 50 mm ² FCBGA (flip chip ball grid array) was built with LTD interface. The LTD material was filled between the chip surface and heat spreader (HS), it was a liquid form metal with melting point > 10 °C. To compare with solid TIM (thermal interface material) (like Silicon base), LM (liquid metal) TIM does not cause any defect issues such as delamination, coverage decrease, crack and interface layer in the thermal cycle process. In addition, the function of HS-EL (with enhanced layer) can increase the efficiency of heat transfer because of the area ratio of heat transfer (surface area of HS-EL/surface area of chip) > 1 and the effect of high heat flux. Moreover, the HS-EL can be easily designed according to the heat source of chip. The studies were divided into three parts. For the first part, two steps of thermal simulations were conducted. The thermal simulation applied two types of TIM materials; one was using LM and the other was Silicon base as a baseline. Both were built with 80 μm BLT. Results showed that the chip temperature using LM TIM was 16.21 °C lower than that of Silicon base TIM. And the delta temperature between chip surface and HS-EL was 3.45 °C as compared to HS normal with 10.78 °C for using the LM TIM. Lastly, for index theta Junction-to-Case (JC), HS-EL of 0.23 °C /W i s better than HS normal of 0.72 °C /W. Next, the LTD package was built using flip chip assembly line. Two types of HSs (HS normal, HS-EL) were designed using different surfaces to enhance the thermal dissipation areas. The samples of LTD packages were tested for 12 thermal reflow cycles with peak temperature of 245 °C. No LM TIM was leaked for both HSs types. 3D X-ray then was conducted and found that the interfacial area of LM TIM coverage was over 95% between chip-to-LM TIM and LM TIM-to-HS. Mechanical tests were then performed. The average data of pull force was 242.99 kg and shear force was 415.48 kg respectively. The delta temperature between glass substrate and HS was measured. HS and HS-EL had 39.6% and 51.2% respectively lower than Silicon based TIM. Finally, the assembled FCBGA packages with LM TIM were stressed for reliability tests. It passed MSL4 preconditioning with 700 thermal cycles under -55 ~125°C. At the intermittent readouts of 200 and 700 thermal cycles, the coverage of LM TIM was well intact and exceeded 96.8% between the two interfaces. Again, 3D X-Ray was conducted and confirmed no leakage LM TIM was found. In summary, we have developed a highly thermal dissipated package for large HPC package. It solves the package warpage induces thermal transfer issues. LM TIM package does not have any delamination and well contact to chip surface and HS. Neither crack nor voids were found at the interface before and after reliability tests. The package was validated by thermal simulation and real sample built. It passed multiple reflow cycles and reliability tests. The full descriptions of the development results will be discussed in this paper.