绝缘体上的硅
静电放电
CMOS芯片
过电压
电气工程
电子工程
晶体管
瞬态(计算机编程)
材料科学
双极结晶体管
电力传输
工程类
硅
光电子学
计算机科学
电压
操作系统
作者
Philippe Galy,Johan Bourgeat,Nicolas Guitard,Jean-Daniel Lise,D. Marin-Cudraz,Charles-Alexandre Legrand
标识
DOI:10.1109/ted.2017.2741524
摘要
The main purpose of this paper is to introduce an ultracompact device for electrostatic discharge (ESD) protection based on a bipolar metal oxide silicon (BIMOS) transistor merged with a dual back-to-back silicon-controlled rectifier (SCR) for bulk and for ultrathin body box fully depleted (FD)-silicon on insulator (SOI) advanced CMOS technologies in the hybrid bulk thanks to process co-integration. It is well known that ESD protection is a challenge for IC in advanced CMOS technology. In this paper, an optimized solution is described through the concept, design, 3-D technology computer aided design (TCAD) simulation, and silicon characterization in 28-nm FD-SOI in hybrid bulk. Measurements are done thanks to transmission line pulsed (TLP), very fast TLP and dc behavior. Moreover, the overvoltage is investigated through very fast transient characterization system measurements. It demonstrates a promising candidate to protect against ESD event and to develop new ESD network dedicated to system on chip.
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