材料科学
异质结
光电子学
场效应晶体管
石墨烯
量子电容
双层石墨烯
半导体
基质(水族馆)
晶体管
凝聚态物理
范德瓦尔斯力
带隙
双层
双极扩散
纳米技术
电子
物理
化学
地质学
海洋学
量子力学
电压
生物化学
膜
分子
作者
Teerayut Uwanno,Takashi Taniguchi,Kenji Watanabe,Kosuke Nagashio
标识
DOI:10.1021/acsami.8b08959
摘要
Bilayer graphene field effect transistors (BLG-FETs), unlike conventional semiconductors, are greatly sensitive to potential fluctuations because of the charged impurities in high-k gate stacks because the potential difference between two layers induced by the external perpendicular electrical filed is the physical origin behind the band gap opening. The assembly of BLG with layered h-BN insulators into a van der Waals heterostructure has been widely recognized to achieve the superior electrical transport properties. However, the carrier response properties at the h-BN/BLG heterointerface, which control the device performance, have not yet been revealed because of the inevitably large parasitic capacitance. In this study, the significant reduction of potential fluctuations to ∼1 meV is achieved in an all-two-dimensional heterostructure BLG-FET on a quartz substrate, which results in the suppression of the off-current to the measurement limit at a small band gap of ∼90 meV at 20 K. By capacitance measurement, we demonstrate that the electron trap/detrap response at such heterointerface is suppressed to undetectable level in the measurement frequency range. The electrically inert van der Waals heterointerface paves the way for the realization of future BLG electronics applications.
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