材料科学
原子层沉积
金属浇口
高-κ电介质
等效氧化层厚度
光电子学
栅极电介质
栅氧化层
随时间变化的栅氧化层击穿
氮化钽
电介质
退火(玻璃)
氮化物
阈值电压
堆栈(抽象数据类型)
氧化物
硅
图层(电子)
纳米技术
电气工程
电压
晶体管
冶金
工程类
计算机科学
程序设计语言
作者
Satoshi Kamiyama,Etsuo Kurosawa,Yasuo Nara
出处
期刊:Journal of The Electrochemical Society
[The Electrochemical Society]
日期:2008-01-01
卷期号:155 (6): H373-H373
被引量:10
摘要
We have studied the effect on the electrical properties of depositing Lanthanum-oxide capping layers on Hafnium-silicon-oxynitride /Tantalum-silicon-nitride metal gate first stacks. The capping layers were deposited by atomic layer deposition (ALD) using a precursor and ozone. The capacitance voltage characteristics shifted negatively by a significant amount with increasing numbers of cycles, and the shifts in the flatband voltage with 10 ALD cycles were for gate stacks with compositions of 56 and 74%. An equivalent oxide thicknesses (EOT) of was obtained for the gate stack with composition of 74% with a capping layer. Postdeposition annealing at 1050°C caused Lanthanum diffusion into the gate stack, forming bonds at the interface, and increasing the dielectric constant. The threshold voltage achieved with two cycles and the 56% composition gate stack was , almost the same as that for /n-Poly Si devices. The drain current at improved dramatically with the increasing number of ALD cycles, with values twice as large for devices capped with compared to those with bare gate stacks (noncapped samples). The EOTs and gate leakage current densities clearly meet the criteria for half pitch metal gate bulk devices in the International Technology Roadmap for Semiconductor 2006.
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