节点(物理)
频道(广播)
材料科学
光电子学
电子工程
计算机科学
工程物理
工程类
计算机网络
结构工程
作者
Jérôme Mitard,Liesbeth Witters,Y. Sasaki,Hiroaki Arimura,Andreas Schulze,Roger Loo,Lars‐Åke Ragnarsson,Andriy Hikavyy,Daire Cott,T. Chiarella,S. Kubicek,Hans Mertens,R. Ritzenthaler,C. Vrancken,Paola Favia,H. Bender,Naoto Horiguchi,K. Barla,D. Mocuta,A. Mocuta,N. Collaert,A. V-Y. Thean
标识
DOI:10.1109/vlsit.2016.7573368
摘要
Sub-30nm L G Fin-replacement strained-Germanium pFinFETs at state-of-art device dimensions are reported with optimized S/D junctions and RMG stack. Competitive performance is shown for the first time when comparing the sGe devices with counterparts from the same 14-16nm R&D platform (Ge vs Si channel, FinFET vs lateral Gate All around). Improvement in channel passivation efficiency at scaled device features is seen to be an important knob to further boost the performance of scaled Ge channel FINFETs.
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