Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F2 High-Density Integration

For the first time, we experimentally demonstrate a 1T1C ferroelectric capacitive memory (FCM) cell by vertically stacking the high-performance inversion-type FCM with the back-end-of-line (BEOL) IGZO channel access transistor having SS of 70 mV/decade. Based on the 1T1C configuration, we design and demonstrate a reading scheme by charge sharing between FCM and bit line capacitor. Thanks to the low write current of FCM, IGZO FET can provide sufficient current for the effective write operation even in highly scaled cells. With the 3D monolithic integration capability of IGZO FETs, we further propose a 1T1C FCM array structure to realize the highest density with $4\mathrm{F}^{2}1 \mathrm{T}1\mathrm{C}$ cell size by stacking two layers of IGZO access transistors on top of the memory. We also validate the operation of the highly scaled $4\mathrm{F}^{2}1 \mathrm{T}1\mathrm{C}$ cell with experiment-calibrated TCAD and SPICE simulation and predict that the 1T1C configuration is able to improve the delay and energy consumption by 87 times and 92 times respectively in the large-scale array compared with the FCM crossbar.