探测器
现场可编程门阵列
频道(广播)
分辨率(逻辑)
飞行时间
材料科学
光电子学
计算机科学
物理
光学
计算机硬件
电信
人工智能
作者
Xinpeng Wang,Haibo Yang,Xiaolin Xia,Chao‐Jie Zou,Yangzhou Su,Wenchao Sun,Shikai Wang,Yun Zhao,Chengxin Zhao
标识
DOI:10.1088/1748-0221/19/11/c11008
摘要
Abstract The Time-to-Digital Converter (TDC) is widely used for precise time interval measurements and play a critical role in Time-of-Flight (ToF) applications. In this paper, we present the design of a 64-channel leading-edge and trailing-edge TDC based on a Field-Programmable Gate Array (FPGA). This TDC is implemented on a Xilinx Kintex-7 XC7K410T-2FFG900I FPGA and consists of modules including a coarse counter, pulse generator, tapped delay line, decomposition encoder, and calibrator. To better evaluate its performance, we designed a multi-channel hardware verification board. According to laboratory test results, the timing precision has a root mean square (RMS) value of 6.69 ps, and a least significant bit (LSB) of 2.99 ps. The experimental results confirm that our TDC design achieves excellent timing precision.
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