Glass Multilayer Package Substrate using Conductive Paste Via Connection

High-density packaging technologies such as 2.5D interposer technology have the potential to enhance computing performance because interposer technologies can improve input/output connections for multi-chip packaging. However, it is difficult to use interposer technology to manufacture large-sized packages because of coefficient of thermal expansion (CTE) mismatches between the interposer and organic package substrate. Here, we reported a novel glass package substrate that is stacked with glass cores, and we used conductive paste with interstitial vias. The glass package substrate enables eliminating the packaging process of the interposer and low CTE of glass; thus, it is cost-effective for the printed circuit board process. The glass package substrate passed the reflow test five times, an unbiased highly accelerated stress test 300 hours, and the thermal cycle test 750 cycles. The warpage of the glass package substrate was smaller than that of conventional organic packages. The CTE of glass was the same as that of silicon; therefore, the glass package substrate can eliminate CTE mismatch. Moreover, the stress resistance for bending stress test was stronger because of the structure of the glass core. We believe that glass package substrates are suitable alternatives to interposer technologies.